1. Field of the Invention
This invention relates to an inverter system comprised of a plurality of inverters operated in parallel, and more particularly to an inverter system capable of keeping balance of sharing of load between respective inverters even in the case where a load undergoes a sudden change.
2. Prior Art
In the case where a required capacity cannot be ensured by a single inverter, or in the case where the reliability is required to be improved as a power supply system using inverter, there are many instances where a plurality of inverters may be operated in parallel. In this case, in order to allow an inverter system to have a capacity corresponding to the number of inverters operated in parallel, it is required to cause respective inverters to equally share the load.
Referring to FIG. 1, there is shown an example of the configuration of a conventional control system constituted with a view to keeping balance of sharing of load between inverters (see Japanese Patent Publication (JP-B}No. 46955/1983). This control system is directed to a control system adapted for operating in parallel two inverters 3a and 3b. The first inverter 3a is included in a first inverter unit 1a, and the second inverter 3b is included in a second inverter unit 1b. Each of these inverter units 1a and 1b converts a d.c. power delivered from a d.c. power supply 2 to an a.c. power to deliver it to a load 20. It is to be noted that, in this specification, suffix a is attached to reference numerals indicating components belonging to the first inverter unit 1a and suffix b is attached to reference numerals indicating components belonging to the second inverter unit 1b, thus to discriminate between respective components of the both inverter units. The d.c. power supply 2 may be comprised of an a.c. power supply and a rectifier, or may be comprised of a battery. Furthermore, such d.c. power supply 2 may employ the above-mentioned both power supply systems suitably in combination. In addition, d.c. power supplies may be separately on the inverters 1a and 1b sides, respectively. To the output terminals of the inverters 3a and 3b, a.c. filters 4a and 4b for improvement of waveform are connected, respectively. There are many instances where a.c. filters of this kind are comprised of a reactor and a capacitor. However, in the case where transformers are respectively connected between the inverter 3a and the load 12, and between the inverter 3b and the load 12, impedance of each transformer itself may be substituted for discrete reactor.
Output currents Ia and Ib of the inverters 3a and 3b are detected by current detectors 11a and 11b on the output side of the a.c. filters 4a and 4b, respectively. In the first inverter unit 1a, a current difference .DELTA.Ia =Ia-Ib is provided by a subtracter 12a. Similarly, in the second inverter unit lb, a current difference .DELTA.Ib =Ib-Ia is provided by a subtracter 12b. A common output voltage V of the both inverter units 1a and 1b is detected by voltage detectors 13a and 13b. On the basis of the voltage V and the current differences .DELTA.Ia and .DELTA.Ib detected in this way, an effective power detector 9a calculates an effective power difference .DELTA.Pa=V.multidot..DELTA.Ia.multidot.cos.theta., and an effective power detector 9b calculates an effective power difference .DELTA.Pb=V.multidot..DELTA.Ib.multidot.cos.theta.. Furthermore, on the basis of the same detected values as above, a reactive power detector 10a calculates a reactive power difference .DELTA.Qa=V.multidot..DELTA.Ia.multidot.sin.theta., and a reactive power detector 10b calculates a reactive power difference .DELTA.Qb=V.multidot..DELTA.Ib.multidot.sin.theta.. It is to be noted that .theta. is assumed to be a phase difference between a detected voltage and a detected current. The output of a synchronous control circuit comprised of a frequency reference oscillator (OSC) 7a and a synchronous controller (PLL) 8a is controlled on the basis of the effective power difference .DELTA.Pa. Similarly, the output of a synchronous control circuit comprised of a frequency reference oscillator (OSC) 7b and a synchronous controller (PLL) 8b is controlled on the basis of the effective power difference .DELTA.Pb. Each of the power differences .DELTA.Pa, .DELTA.Pb, .DELTA.Qa and .DELTA.Qb corresponds to a voltage signal converted by multiplying a conversion coefficient, in the corresponding power detector. The frequency reference oscillators 7a and 7b deliver a frequency reference for to the synchronous controllers 8a and 8b. The synchronous controllers 8a and 8b generate frequency control signals for gate signal generators (PWM) 5a and 5b adapted for generating firing control pulses for PWM (Pulse Width Modulation) control, respectively. Furthermore, voltage controllers (VC) 6a and 6b basically serve to allow a voltage V detected by the voltage detectors 13a and 13b to be in correspondence with a voltage reference Vr. In this example, the voltage controllers 6a and 6b correct amplitudes of output voltages of the respective inverter units on the basis of reactive power differences .DELTA.Qa and .DELTA.Qb so that output currents Ia and Ib of the both inverters 3a and 3b are balanced to output control signals for voltage amplitudes to the gate signal generators 5a and 5b, respectively. On the basis of the control signals delivered from the synchronous controllers 8a and 8b and the voltage controllers 6a and 6b, the gate signal generators 5a and 5b control output voltages of the respective inverters 3a and 3b.
In the inverter system of FIG. 1, control is carried out such that respective inverter units 1a and 1b equally share a power, i.e., a current to the load 20 on the basis of effective power difference .DELTA.Pa and .DELTA.Pb and reactive power differences .DELTA.Qa and .DELTA.Qb. Each of the effective power detectors 9a and 9b adapted for detecting effective power differences .DELTA.Pa and .DELTA.Pb and the reactive power detectors 10a and 10b adapted for detecting reactive power differences .DELTA.Qa and .DELTA.Qb detects an average value of a power in place of an instantaneous value of a power. Namely, this control system is directed to a system adapted for controlling, on the basis of the above detection, an average value of a power instead of an instantaneous value of a power. For this reason, this control system not only requires a time for calculating an average value, but also includes a filter serving as a delay element in the power detection system. Accordingly, with this control system, delay in detection would be increased. For this reason, for example, in such cases where the load 20 suddenly changes, there was the possibility that there may transiently take place an unbalance in the load sharing of the respective inverter units la and lb, particularly in an extreme case, an inverter unit which has shared a more current may be brought into an overload state, leading to stop of operation.